FIG. 1 is a cross-sectional view illustrating one example of a conventional semiconductor light emitting device. The conventional semiconductor light emitting device includes a substrate 100, a buffer layer 200 epitaxially grown on the substrate 100, an n-type nitride compound semiconductor layer 300 epitaxially grown on the buffer layer 200, an active layer 400 epitaxially grown on the n-type nitride compound semiconductor layer 300, a p-type nitride compound semiconductor layer 500 epitaxially grown on the active layer 400, a p-side electrode 600 formed on the, p-type nitride compound semiconductor layer 500, a p-side bonding pad 700 formed on the p-side electrode 600, and an n-side electrode 800 formed on the n-type nitride compound semiconductor layer 301 exposed by mesa-etching the p-type nitride compound semiconductor layer 500 and the active layer 400.
In the case of the substrate 100, a GaN substrate can be used as a homo-substrate, and a sapphire substrate, an SiC substrate or an Si substrate can be used as a hetero-substrate. However, any kinds of substrates on which the nitride compound semiconductor layers can be grown can be used.
The nitride compound semiconductor layers epitaxially grown on the substrate 100 are mostly grown by the metal organic chemical vapor deposition (MOCVD).
The buffer layer 200 serves to overcome differences in lattice parameter and thermal expansion coefficient between the hetero-substrate 100 and the nitride compound semiconductor. U.S. Pat. No. 5,122,845 discloses a method for growing an AlN buffer layer having a thickness of 100 to 500 Å on a sapphire substrate at 380 to 800° C. U.S. Pat. No. 5,290,393 discloses a method for growing an Al(x)Ga(1−x)N (0≦x≦1) buffer layer having a thickness of 10 to 5000 Å □ on a sapphire substrate at 200 to 900° C. The international publication official gazette WO/05/053042 discloses a method for growing an SiC buffer layer (seed layer) at 600 to 990° C., and growing an In(x)Ga(1−x)N (0<x≦1) layer thereon.
In the n-type nitride compound semiconductor layer 300, at least the n-side electrode 800 formed region (n-type contact layer) is doped with a dopant. Preferably, the n-type contact layer is made of GaN and doped with Si. U.S. Pat. No. 5,733,796 discloses a method for doping an n-type contact layer at a target doping concentration by controlling a mixture ratio of Si and other source material.
The active layer 400 generates light quantum (light) by recombination of an electron and a hole. Normally, the active layer 400 is made of In(x)Ga(1−x)N (0<x≦1) and comprised of single quantum well layer or multi quantum well layers. The international publication official gazette WO/02/021121 discloses a method for partially doping a plurality of quantum well layers and barrier layers.
The p-type nitride compound semiconductor layer 500 is doped with an appropriate dopant such as Mg, and provided with p-type conductivity by activation. U.S. Pat. No. 5,247,533 discloses a method for activating a p-type nitride compound semiconductor layer by electron beam radiation. U.S. Pat. No. 5,306,662 discloses a method for activating a p-type nitride compound semiconductor layer by annealing over 400° C. Also, the international publication official gazette WO/05/022655 discloses a method for endowing a p-type nitride compound semiconductor layer with p-type conductivity without activation, by using ammonia and a hydrogen group source material as a nitrogen precursor for the growth of the p-type nitride compound semiconductor layer.
The p-side electrode 600 facilitates current supply to the whole p-type nitride compound semiconductor layer 500. U.S. Pat. No. 5,563,422 discloses a light transmittable electrode formed almost on the whole surface of a p-type nitride compound semiconductor layer to ohmic-contact the p-type nitride compound semiconductor layer, and composed of Ni and Au. U.S. Pat. No. 6,515,306 discloses a method for forming an n-type super lattice layer on a p-type nitride compound semiconductor layer, and forming a light transmittable electrode made of ITO thereon.
On the other hand, the p-side electrode 600 can be formed thick not to transmit light, namely, to reflect light to the substrate side. A light emitting device using the p-side electrode 600 is called a flip chip. U.S. Pat. No. 6,194,743 discloses an electrode structure including an Ag layer having a thickness 20 nm and over, a diffusion barrier layer for covering the Ag layer, and a bonding layer made of Au and Al for covering the diffusion barrier layer.
The p-side bonding pad 700 and the n-side electrode 800 are formed for current supply and external wire bonding. U.S. Pat. No. 5,563,422 discloses a method for forming an n-side electrode with Ti and Al, and U.S. Pat. No. 5,652,434 discloses a method for making a p-side bonding pad directly contact a p-type nitride compound semiconductor layer by removing a part of a light transmittable electrode.
One of the disadvantages of the III-nitride compound semiconductor light emitting device is that a large amount of light generated in the active layer 400 is confined inside the device and the substrate 100 due to a refractive index difference between the device and the ambient air.
In the device showing serious light confinement, namely, the device having low external quantum efficiency, a large amount of light is confined and vanished as heat. Accordingly, a temperature of the device rises, which affects the lifespan and property of the device.
External quantum efficiency can be improved by mechanically processing a chip shape of the light emitting device, or roughening the surface of the semiconductor layer by chemical etching or dry etching. Recently, in the growth of the p-type nitride compound semiconductor layer 500, the surface is roughened with deteriorating quality of thin film by using the growth conditions such as pressure, temperature and gas flow.
The mechanical processing is suitable for the substrate having low hardness such as SiC. However, it is difficult to mechanically process the substrate having high hardness such as sapphire. In addition, when the surface of the semiconductor layer is roughened by chemical etching or dry etching, the roughenable area is limited and reproducibility and uniformity are reduced.
In the case that the surface of the p-type nitride compound semiconductor layer 500 is roughened by changing the growth conditions, external quantum efficiency of the device can be improved, but reliability thereof may be seriously reduced.